library ieee;
use ieee . std-logic-1164.all ;
entity barrel-shifter is
port (
	a	: in std-logic-vector (7 downto 0) ;
	amt	: in std-logic-vector (2 downto 0) ;
	y	: out std-logic-vector(7 downto 0)
);
end barrel-shifter;

architecture sel-arch of barrel-shifter i s
begin
	w i t h amt s e l e c t
		y<=	a				when "000" ,
			a(0) & a(7 downto 1 )		when "OOl" ,
			a(l downto 0) & a(7 downto 2)	when "OlO" ,
			a(2 downto 0) & a(7 downto 3)	when "O1l",
			a(3 downto 0) & a(7 downto 4)	when "lOO" ,
			a(4 downto 0) & a(7 downto 5)	when "101" ,
			a(5 downto 0) & a(7 downto 6)	when "110 " ,
			a(6 downto 0 ) & a(7)		when others; -- 111
end sel-arch ;

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity shifter is
port (
X	:  in std_logic_vector (3 downto 0);
Y	:  in std_logic_vector (3 downto 0);
sel	:  in std_logic_vector (2 downto 0);
F	:  out unsigned (3 downto 0)
); 
end shifter;

architecture Behavior of shifter is
begin

with sel select
	F<=	unsigned(X) ROR 1 	when "000",
		unsigned(X) ROR 2	when "001",
		unsigned(X) ROL 1	when "010",
		unsigned(X) ROL 2	when "011",
		unsigned(X) SLL 1	when "100",
		unsigned(X) SLL 2	when "101",
		unsigned(X) SRL 1	when "110",
		unsigned(X) SRL 2	when "111";

end Behavior;